TiROS Documentation

Version 1.00

Overview

TiROS (Tickless Real-Time Operating System) is a pre-emptive priority based real-time task-scheduler. It can be used by developers to facilitate multi-tasking on microcontroller based embedded systems that have very limited resources.

It is available under a modified GPL license (eCos open source license) that allows it to be used for commercial purposes at no cost. It requires less than 200 bytes of RAM for typical uses (Exact number is dependent upon number of tasks and hardware). Thus it can be used where sophisticated free OSes like Linux or eCOS cannot be used. It is more closely comparable in features and resource usage to FreeRTOS. At the same time, it provides real-time capabilities and other features that are useful in an embedded system.

• Hard Priorities: TiROS schedules tasks in a deterministically predictable manner. Every task has a unique priority. The highest priority ready task that is active is always the one running. It stays active until it explicitly sleeps, waits, or is blocked for a resource.

• Tickless Scheduling: TiROS avoids most context-switching overhead costs by eliminating periodic ticks. In most embedded real-time OSes, there is a trade off between high time-resolution (by increasing tick frequency) and overhead. TiROS does not use ticks. TiROS supports high resolution time (depending on the hardware capabilities) and only wakes when needed. This reduces overhead. To accomplish this, it takes advantage of the compare features of timers in modern micro-controllers. Even in processors where there is no hardware support for this, software based virtual compare can be performed.

• Low Memory Usage: TiROS was designed to have an extremely low RAM footprint. Internally, all data structures use static memory allocation. There is no memory-manager provided with TiROS. With the appropriate mutexes or critical sections, the user can still use other memory managing code.

• Multi-tasking Primitives: Tasks have access to synchronization primitives such as mutexes, counting semaphores, message queues, and event flags.

• Deadlock Prevention: TiROS has been designed to provide reliable real-time capabilities. TiROS has two mechanisms for preventing priority inversion.
  1. Immediate Priority Ceiling Protocol.
  2. Priority Inheritance Protocol.
  The implementation of these mechanisms is described in the TiROS documentation.

• Low overhead interrupts: On hardware that supports software initiated interrupts (or software traps) interrupt service routine can be written with low overhead because they do not have to save and load the context upon every interrupt invocation.

• Nested interrupts are supported as a configuration option, but they are discouraged. They are problematic in that, in extreme cases, they can lead to a stack overflow. The size of a task stack is determined by the stack usage of the task, the stack usage of OS calls, and stack usage of any interrupt handlers that occur during the task. If interrupts are nested, the stack can potentially expand in an unbounded manner depending on the nesting level. On most processors, when an interrupts occurs and the program counter vectors to the interrupt, global interrupts are disabled. They can be explicitly re-enabled within the ISR to nest interrupts. However, with some processors like the 8051, global interrupts are not disabled. This means that an nested interrupt can occur just as the first ISR is being started. On such processors, there is no good way to infer the nesting level correctly. The best that can be done is to have the first instruction within the ISR disable global interrupts. But there is still a small period of contention (one instruction time) where a nested interrupt can occure before the first instruction within the ISR is executed.

Hardware Support

TiROS is written in "C" and is designed to be easy to port to different hardware. The hardware-specific portion of the operating system is separated into a HAL (Hardware Abstraction Layer). The current version of TiROS is available with three HALs;

• MSP430 family with GCC Compiler.
• MSP430 family with IAR Compiler.
• Posix HAL that allows for the use of TiROS on any Posix compliant operating system such as Linux. This allows for easy simulation and testing of software.

Detailed Description

1. Getting Started with TiROS.
2. Programming Guide
   • TiROS Configuration.
   • Application Programming Interface (API).
3. Mutual Exclusion (Mutex) Implementation.
4. Hardware Support
   • Porting Guide.
   • HAL for MSP430 family with mspgcc compiler.
   • HAL for MSP430 family with IAR compiler.
   • Posix HAL.
5. License.

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