HAL for MSP430 family with IAR compiler

This is the TiROS hardware abstraction layer for the Texas Instruments MSP430x family of embedded microcontrollers with the IAR compiler.

This microcontroller family can support software interrupts. These microcontrollers can be driven from a 32kHz crystal oscillator. The time functions have been written assuming such an oscillator drives the timer. If this is not the case, modify the functions in porttime.h and the timer initialization functions in tr_port.c.

Note that in the MSP430 architecture, the low-power state of the processor is stored in the status register. Since this is part of the context, per-task power control is automatic. To keep the processor in low-power state during idle time, simple define the idle task as

 void idle_task(void *dummy) 
 {
   while(1) {
     // Set low power state here 
   }
 }

Tested with TI MSP430x1611 To use the IAR tools for development: Set the following directories in the include path for project options ( C compiler->Preprocessor)

1. $PROJ_DIR$ (containing your proj_config.h file)
2. path to the inc directory
3. path to src/tiros
4. path to src/tiros/port/msp430_iar

Configuration Options:

TRPORT_MSP_OSTIMER [A | B] :

Options are A or B. The MSP430 family supports two timers, TimerA and TimerB. TimerA is available on the entire family line. TimerB is only available on some. By default, if this configuration option is not set, TimerA is used as source for the timer interrupt.

TIROS_KERNEL_TRAP_ENABLED [0|1]:

If this define is set to 1, OS kernel context switches from ISRs are made using a software trap (i.e.) by causing an interrupt under software control. This makes ISRs very efficient. The MSP430_IAR port currently requires kernel traps. So this is enabled as a default.

USER_DEFINED_KERNEL_TRAP :

If TIROS_KERNEL_TRAP_ENABLED is set to 1, kernel traps are enabled. The default implementation uses Port 2, pins. By setting a specific pin, an interrupt is forced. The user can override this default and specify a different interrupt handler for this purpose. In this case, create user definitions for isr_kernel_trap and OS_KERNEL_TRAP, and hal_setup_kernel_trap() . Do not define or set these functions if TIROS_KERNEL_TRAP_ENABLED is set to 0.

Writing ISRs.

If no TiROS API functions will be called, interrupts will stay disabled, then the ISR can be written very simply. See the requirements in Usage with Interrupt Service Routines.

 #pragma vector=VECTOR_NUM
  __interrupt void ISR_function(void)
 {
  // do stuff 
 }

If TiROS APIs will be used, the form of the ISR depends on whether TIROS_KERNEL_TRAP_ENABLED is set (It is set as a default). If TIROS_KERNEL_TRAP_ENABLED is set to 1, the ISR is simple

 #pragma vector=VECTOR_NUM
 __interrupt void ISR_function(void) 
 {
   int x;
   OS_CRITICAL_ENABLE();   // Only needed if any critical sections
                           // will be used and interrupt nesting is enabled.

   OS_ISR_BEGIN();         // Mark the beginning of an ISR. Note
                           // that if OS_CRITICAL_ENABLE() is also
                           // present, then this comes after 
                           // that. 
  
  x = 3;
    Do more stuff ....
  
  OS_ISR_END();
 }

This port currently requires TIROS_KERNEL_TRAP_ENABLED.

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